Method and memory used for reducing program disturbance by adjusting voltage of dummy word line
US11848058B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 7, 2023 |
| Grant date | Dec 19, 2023 |
| Priority date | — |
| Expiry date | Mar 7, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B43/27
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for operating a memory is disclosed. The memory includes a first group of word lines, a second group of word lines, a first dummy word line, and a second dummy word line. The first dummy word line and the second dummy word line are between the first group of word lines and the second group of word lines. A first pass voltage is applied to the first dummy word line and applying a second pass voltage to the second dummy word line. A program voltage is applied to a selected word line, wherein a condition is met: a first voltage difference between the first pass voltage and a first threshold voltage of a first dummy cell corresponding to the first dummy word line is different from a second voltage difference between the second pass voltage and a second threshold voltage of a second dummy cell corresponding to the second dummy word line.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.