Patent · US Active

Semiconductor package and passive element with interposer

US11848262B2 · kind B2 · utility

0Cited by

4References

17Claims

0Family size

Assignee

Infineon Technologies AG · DE

Inventors

Angela Kessler · Regensburg, DE
Robert Carroll · Berkeley, US
Robert Fehler · Regensburg, DE

Key dates

Filing date	Feb 16, 2021
Grant date	Dec 19, 2023
Priority date	—
Expiry date	Aug 29, 2041

Classification

Technology area (CPC H)Electricity
CPC primaryH01L2924/19104
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

A semiconductor assembly includes an interposer that includes an insulating substrate, a plurality of upper contact pads on an upper surface of the substrate, and a plurality of lower contact pads on a lower surface of the substrate, a semiconductor package that includes a semiconductor die embedded within a package body and a plurality of package terminals exposed from the package body, a first passive electrical element that includes first and second terminals, a first electrical connection between the first terminal of the first passive electrical element and a first one of the lower contact pads via the interposer, a second electrical connection between the second terminal of the first passive electrical element and a first one of the package terminals, and a third electrical connection between a second one of the package terminals and a second one of the lower contact pads via the interposer.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.