Patent · US Active

Combined world-space pipeline shader stages

US11869140B2 · kind B2 · utility

0Cited by
53References
18Claims
0Family size

Assignee

Inventors

Key dates

Filing dateApr 19, 2021
Grant dateJan 9, 2024
Priority date
Expiry dateMay 28, 2041

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06T15/005
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

Improvements to graphics processing pipelines are disclosed. More specifically, the vertex shader stage, which performs vertex transformations, and the hull or geometry shader stages, are combined. If tessellation is disabled and geometry shading is enabled, then the graphics processing pipeline includes a combined vertex and graphics shader stage. If tessellation is enabled, then the graphics processing pipeline includes a combined vertex and hull shader stage. If tessellation and geometry shading are both disabled, then the graphics processing pipeline does not use a combined shader stage. The combined shader stages improve efficiency by reducing the number of executing instances of shader programs and associated resources reserved.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.