Openings layout of three-dimensional memory device

US11903195B2 · kind B2 · utility

Assignee

• YANGTZE MEMORY TECHNOLOGIES CO., LTD. · CN

Inventors

• Jia He · Yangshuo, CN
• Haihui Huang · Hubei, CN
• Fandong Liu · 红钢城街道, CN
• Yaohua Yang · Beaverton, US
• Peizhen Hong · Hubei, CN
• Zhiliang Xia · 红钢城街道, CN
• Zongliang Huo · 红钢城街道, CN
• Yaobin Feng · Hubei, CN
• Baoyou Chen · 红钢城街道, CN
• Qingchen Cao · Hubei, CN

Key dates

• Filing date: Jan 19, 2023
• Grant date: Feb 13, 2024
• Expiry date: Jan 19, 2043

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D64/037

Abstract

Embodiments of semiconductor devices and methods for forming the semiconductor devices are disclosed. In an example, a method for forming device openings includes forming a material layer over a first region and a second region of a substrate, the first region being adjacent to the second region, forming a mask layer over the material layer, the mask layer covering the first region and the second region, and forming a patterning layer over the mask layer. The patterning layer covers the first region and the second region and including openings corresponding to the first region. The plurality of openings includes a first opening adjacent to a boundary between the first region and the second region and a second opening further away from the boundary. Along a plane parallel to a top surface of the substrate, a size of the first opening is greater than a size of the second opening.