Patent · US Active

Manufacturing method of connection structure of semiconductor device

US11916018B2 · kind B2 · utility

0Cited by
20References
6Claims
0Family size

Assignee

Inventors

Key dates

Filing dateMar 4, 2021
Grant dateFeb 27, 2024
Priority date
Expiry dateMar 8, 2042

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L23/5329
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

A connection structure of a semiconductor device is provided in the present invention. The connection structure includes an interlayer dielectric, a top metal structure, and a passivation layer. The interlayer dielectric is disposed on a substrate. The top metal structure is disposed on the interlayer dielectric. The top metal structure includes a bottom portion and a top portion disposed on the bottom portion. The bottom portion includes a first sidewall, and the top portion includes a second sidewall. A slope of the first sidewall is larger than a slope of the second sidewall. The passivation layer is conformally disposed on the second sidewall, the first sidewall, and a top surface of the interlayer dielectric.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.