Subtractive metals and subtractive metal semiconductor structures
US11923244B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 5, 2021 |
| Grant date | Mar 5, 2024 |
| Priority date | — |
| Expiry date | Mar 5, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76897
- WIPO fieldSurface technology, coating
- WIPO sectorChemistry
Abstract
Embodiments of the present disclosure generally relate to subtractive metals, subtractive metal semiconductor structures, subtractive metal interconnects, and to processes for forming such semiconductor structures and interconnects. In an embodiment, a process for fabricating a semiconductor structure is provided. The process includes performing a degas operation on the semiconductor structure and depositing a liner layer on the semiconductor structure. The process further includes performing a sputter operation on the semiconductor structure, and depositing, by physical vapor deposition, a metal layer on the liner layer, wherein the liner layer comprises Ti, Ta, TaN, or combinations thereof, and a resistivity of the metal layer is about 30 μΩ·cm or less.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.