Bonded assembly including an airgap containing bonding-level dielectric layer and methods of forming the same
US11948902B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 8, 2021 |
| Grant date | Apr 2, 2024 |
| Priority date | — |
| Expiry date | Apr 7, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/1438
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A bonded assembly includes a first semiconductor die containing a first substrate, first semiconductor devices, and first bonding pads laterally surrounded by a first pad-level dielectric layer. The first pad-level dielectric layer includes at least one first encapsulated airgap located between neighboring pairs of first bonding pads and encapsulated by a first dielectric fill material of the first pad-level dielectric layer. The bonded assembly includes a second semiconductor die containing a second substrate, second semiconductor devices, and second bonding pads laterally surrounded by a second pad-level dielectric layer. Each of the second bonding pads is bonded to a respective one of the first bonding pads.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.