In-package 3D antenna
US12003023B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 26, 2019 |
| Grant date | Jun 4, 2024 |
| Priority date | — |
| Expiry date | Nov 25, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2201/10098
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An RF chip package comprises a housing and one or more conductive contacts designed to electrically connect the RF chip package to other conductive contacts. The housing includes a first substrate, a 3-D antenna on the first substrate, and a second substrate. The second substrate includes a plurality of semiconductor devices and is bonded to the first substrate. An interconnect structure allows for electrical connection between the first and second substrates. In some cases, the first substrate is flip-chip bonded to the second substrate or is otherwise connected to the second substrate by an array of solder balls. By integrating both the 3-D antenna and RF circuitry together in the same chip package, costs are minimized while bandwidth is greatly improved compared to a separately machined 3-D antenna.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.