Patent · US Active

Partitioned memory having error detection capability

US12026052B2 · kind B2 · utility

0Cited by

13References

20Claims

0Family size

Inventors

Kishore Kumar Muchherla · Fremont, US
Niccolo' Righetti · Boise, US
Jeffrey S. McNeil · Nampa, US
Akira Goda · Boise, US
Todd A. Marquart · Boise, US
Mark A. Helm · Boise, US
Gil Golov · Backnang, DE
Jeremy Binfet · Boise, US
Carmine Miccoli · Boise, US
Giuseppina Puzzilli · Boise, US

Key dates

Filing date	Oct 21, 2022
Grant date	Jul 2, 2024
Priority date	—
Expiry date	Oct 21, 2042

Classification

Technology area (CPC G)Physics
CPC primaryG06F11/1048
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

A memory component comprises a cyclic buffer partition portion and a snapshot partition portion. In response to receiving a signal that a trigger event has occurred, a processing device included in the memory component performs an error correction operation on a portion of data stored in the cyclic buffer partition portion, copies the data stored in the cyclic buffer partition portion to the snapshot partition portion in response to the error correction operation being successful, and sends the data stored in the cyclic buffer partition portion to a processing device operatively coupled to the memory component in response to the error correction operation not being successful.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.