Integrated assemblies and methods of forming integrated assemblies
US12041779B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 23, 2022 |
| Grant date | Jul 16, 2024 |
| Priority date | — |
| Expiry date | Jan 21, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B43/27
Abstract
Some embodiments include an integrated assembly having a vertical stack of alternating insulative and conductive levels. The conductive levels have terminal regions and nonterminal regions. The terminal regions are vertically thicker than the nonterminal regions. Channel material extends vertically through the stack. Tunneling material is adjacent the channel material. Charge-storage material is adjacent the tunneling material. High-k dielectric material is between the charge-storage material and the terminal regions of the conductive levels. The insulative levels have carbon-containing first regions between the terminal regions of neighboring conductive levels, and have second regions between the nonterminal regions of the neighboring conductive levels. Some embodiments include methods of forming integrated assemblies.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.