Semiconductor device package and method of manufacturing the same
US12068259B2 · kind B2 · utility
0Cited by
2References
9Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 14, 2023 |
| Grant date | Aug 20, 2024 |
| Priority date | — |
| Expiry date | Mar 14, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2224/97
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device package includes a substrate having a surface, a conductive element disposed on the surface of the substrate, and an encapsulant disposed on the surface of the substrate and covering the conductive element. The conductive element has an upper surface facing away from the substrate and exposed from the encapsulant. Further, a roughness of the upper surface of the conductive element is greater than a roughness of a side surface of the conductive element.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.