Film stack simplification for high aspect ratio patterning and vertical scaling

US12080592B2 · kind B2 · utility

Assignee

• Lam Research Corporation · US

Inventors

• Hui-Jung Wu · Fremont, US
• Bart J. van Schravendijk · Sunnyvale, US
• Mark Kawaguchi · Palo Alto, US
• Gereng Gunawan · Saratoga, US
• Jay E. Uglow · Livermore, US
• Nagraj Shankar · Tualatin, US
• Gowri Kamarthy · Pleasanton, US
• Kevin McLaughlin · Troy, US
• Ananda Banerji · West Linn, US
• Jialing Yang · Fremont, US
• John Hoang · Fremont, US
• Aaron Lynn Routzahn · Fremont, US
• Nathan Musselwhite · San Jose, US
• Meihua Shen · Fremont, US
• Thorsten Lill · Santa Clara, US
• Hao Chi · San Mateo, US
• Nicholas Dominic Altieri · San Mateo, US

Key dates

• Filing date: Sep 10, 2019
• Grant date: Sep 3, 2024
• Expiry date: Aug 9, 2040

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10B43/50
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

Methods for forming patterned multi-layer stacks including a metal-containing layer are provided herein. Methods involve using silicon-containing non-metal materials in a multi-layer stack including one sacrificial layer to be later removed and replaced with metal while maintaining etch contrast to pattern the multi-layer stack and selectively remove the sacrificial layer prior to depositing metal. Methods involve using silicon oxycarbide in lieu of silicon nitride, and a sacrificial non-metal material in lieu of a metal-containing layer, to fabricate the multi-layer stack, pattern the multi-layer stack, selectively remove the sacrificial non-metal material to leave spaces in the stack, and deposit metal-containing material into the spaces. Sacrificial non-metal materials include silicon nitride and doped polysilicon, such as boron-doped silicon.