Inventor · Pleasanton, CA, US

Gowri Kamarthy

16Patents
6h-index
50Co-inventors
65Inventor score

Filing activity: Jan 7, 2009 → Sep 10, 2019

Most-cited inventions

PatentTitleAreaCited byStatus
US9252238B1 Semiconductor structures with coplanar recessed gate layers and fabrication methods Electricity 405 Active
US9245761B2 Internal plasma grid for semiconductor fabrication Electricity 18 Active
US8852964B2 Controlling CD and CD uniformity with trim time and temperature on a wafer by wafer basis Electricity 14 Active
US9230819B2 Internal plasma grid applications for semiconductor fabrication in context of ion-ion plasma processing Electricity 13 Active
US9460894B2 Controlling ion energy within a plasma chamber Electricity 8 Active
US10141163B2 Controlling ion energy within a plasma chamber Electricity 6 Active
US9633846B2 Internal plasma grid applications for semiconductor fabrication Electricity 6 Active
US10224221B2 Internal plasma grid for semiconductor fabrication Electricity 6 Active
US9012243B2 Controlling CD and CD uniformity with trim time and temperature on a wafer by wafer basis Electricity 4 Active
US8298949B2 Profile and CD uniformity control by plasma oxidation treatment Electricity 2 Active
US8671878B2 Profile and CD uniformity control by plasma oxidation treatment Electricity 1 Active
US8999184B2 Method for providing vias Electricity 1 Active
US10424461B2 Controlling ion energy within a plasma chamber Electricity 1 Active
US9589853B2 Method of planarizing an upper surface of a semiconductor substrate in a plasma etch chamber Electricity 0 Active
US9385003B1 Residue free systems and methods for isotropically etching silicon in tight spaces Electricity 0 Active
US12080592B2 Film stack simplification for high aspect ratio patterning and vertical scaling Electricity 0 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.