Contact over active gate structures with metal oxide layers to inhibit shorting
US12080639B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 23, 2019 |
| Grant date | Sep 3, 2024 |
| Priority date | — |
| Expiry date | Oct 2, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2223/6677
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Contact over active gate structure with metal oxide layers are described are described. In an example, an integrated circuit structure includes a plurality of gate structures above substrate, each of the gate structures including a gate insulating layer thereon. A plurality of conductive trench contact structures is alternating with the plurality of gate structures. A portion of one of the plurality of trench contact structures has a metal oxide layer thereon. An interlayer dielectric material is over the plurality of gate structures and over the plurality of conductive trench contact structures. An opening is in the interlayer dielectric material and in a gate insulating layer of a corresponding one of the plurality of gate structures. A conductive via is in the opening, the conductive via in direct contact with the corresponding one of the plurality of gate structures, and the conductive via on the metal oxide layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.