Integrated circuit structures having differentiated interconnect lines in a same dielectric layer

US12080643B2 · kind B2 · utility

Assignee

• Intel Corporation · US

Inventors

• Travis W. Lajoie · Forest Grove, US
• Abhishek A. Sharma · Hillsboro, US
• Juan G. Alzate Vinasco · Tigard, US
• Chieh-Jen Ku · Hillsboro, US
• Shem Ogadhoh · Beaverton, US
• Allen B. Gardiner · Portland, US
• Blake C. Lin · Portland, US
• Yih Wang · Portland, US
• Pei-Hua Wang · Beaverton, US
• Jack T. Kavalieros · Portland, US
• Bernhard Sell · Dresden, DE
• Tahir Ghani · Portland, US

Key dates

• Filing date: Sep 26, 2019
• Grant date: Sep 3, 2024
• Expiry date: Dec 13, 2042

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D30/62
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

Integrated circuit structures having differentiated interconnect lines in a same dielectric layer, and methods of fabricating integrated circuit structures having differentiated interconnect lines in a same dielectric layer, are described. In an example, an integrated circuit structure includes an inter-layer dielectric (ILD) layer above a substrate. A plurality of conductive interconnect lines is in the ILD layer. The plurality of conductive interconnect lines includes a first interconnect line having a first height, and a second interconnect line immediately laterally adjacent to but spaced apart from the first interconnect line, the second interconnect line having a second height less than the first height.