Multi-level signal reception
US12093124B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 29, 2022 |
| Grant date | Sep 17, 2024 |
| Priority date | — |
| Expiry date | Nov 12, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L25/4917
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for receiving a multi-level error signal having more than two logic levels includes oversampling the multi-level error signal to provide sampled symbols, wherein a first level of the multi-level error signal indicates no error, and second and third levels of the multi-level error signal indicate first and second error conditions, respectively. The sampled signals are de-serialized to provide sets of symbols. A start of a symbol period is determined in response to detecting that a given sample is different from a prior sample, and the prior sample indicates no error. The sets of symbols are filtered to provide corresponding output symbols based on the start.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.