Ramon Mangaser
10Patents
0h-index
18Co-inventors
41Inventor score
Filing activity: Dec 20, 2010 → Sep 29, 2023
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US11960435B2 | Skew matching in a die-to-die interface | Electricity | 0 | Active |
| US12015412B1 | Dual phase clock distribution from a single source in a die-to-die interface | Electricity | 0 | Active |
| US12386750B2 | Last level cache hierarchy in chiplet based processors | Physics | 0 | Active |
| US8553754B2 | Method and apparatus for using DFE in a system with non-continuous data | Electricity | 0 | Active |
| US12288581B2 | Efficient and low power reference voltage mixing | Physics | 0 | Active |
| US12101135B2 | Noise mitigation in single-ended links | Electricity | 0 | Active |
| US11757489B2 | Noise mitigation in single ended links | Electricity | 0 | Active |
| US12088296B2 | Clock gating using a cascaded clock gating control signal | Electricity | 0 | Active |
| US12093124B2 | Multi-level signal reception | Electricity | 0 | Active |
| US12321294B1 | Data lane variation compensation for data rate enhancement | Physics | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.