Adapting electrical, mechanical, and thermal properties of package substrates
US12094726B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 13, 2021 |
| Grant date | Sep 17, 2024 |
| Priority date | — |
| Expiry date | Feb 9, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L23/49827
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present disclosure relates to semiconductor core assemblies and methods of forming the same. The semiconductor core assemblies described herein may be utilized to form semiconductor package assemblies, printed circuit board (PCB) assemblies, PCB spacer assemblies, chip carrier assemblies, intermediate carrier assemblies (e.g., for graphics cards), and the like. In one embodiment, a substrate core (e.g., a core structure) is implanted with dopants to achieve a desired bulk resistivity or conductivity. One or more conductive interconnections are formed in the substrate core and one or more redistribution layers are formed on surfaces thereof. The substrate core may thereafter be utilized as a core structure for a semiconductor package, PCB, PCB spacer, chip carrier, intermediate carrier, or the like.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.