Semiconductor chip with redundant thru-silicon-vias
US12094853B2 · kind B2 · utility
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20Claims
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Key dates
| Filing date | Oct 11, 2022 |
| Grant date | Sep 17, 2024 |
| Priority date | — |
| Expiry date | Oct 11, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/351
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor chip with conductive vias and a method of manufacturing the same are disclosed. The method includes forming a first plurality of conductive vias in a layer of a first semiconductor chip The first plurality of conductive vias includes first ends and second ends. A first conductor pad is formed in ohmic contact with the first ends of the first plurality of conductive vias.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.