Lead adapters for semiconductor package
US12113000B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 2, 2021 |
| Grant date | Oct 8, 2024 |
| Priority date | — |
| Expiry date | Jun 15, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2201/1059
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor package includes a first semiconductor die, an encapsulant body of electrically insulating mold compound that encapsulates the first semiconductor die, a plurality of power leads that protrude out of the encapsulant body and form power connections with the first semiconductor die, and a signal lead that protrudes out of the encapsulant body and forms a signal connection with the first semiconductor die, wherein the signal lead comprises a lead adapter retention feature that is configured to form an interlocked connection with a lead adapter that is fitted over an outer end of the signal lead.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.