Patent · US Active

Systems and methods for improved metrology for semiconductor device wafers

US12131959B2 · kind B2 · utility

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7References
24Claims
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Key dates

Filing dateSep 8, 2021
Grant dateOct 29, 2024
Priority date
Expiry dateJan 8, 2043

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG05B2219/45031
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

A system and method for generating a quality parameter value of a semiconductor device wafer (SDW), during fabrication thereof, the method including designating a plurality of measurement site sets (MSSs) on the SDW, each of the MSSs including a first measurement-orientation site (FMS) and a second measurement-orientation site (SMS), the FMS and the SMS being different measurement sites on the SDW, generating a first measurement-orientation quality parameter dataset (FMQPD) by measuring features formed within each the FMS of at least one of the MSSs in a first measurement orientation, generating a second measurement-orientation quality parameter dataset (SMQPD) by measuring features formed within each the SMS of the at least one of the MSSs in a second measurement orientation and generating at least one tool-induced-shift (TIS)-ameliorated quality parameter value (TAQPV), at least partially based on the FMQPD and the SMQPD.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.