Patent · US Active

Semiconductor package and passive element with interposer

US12131988B2 · kind B2 · utility

0Cited by

4References

14Claims

0Family size

Assignee

Infineon Technologies AG · DE

Inventors

Angela Kessler · Regensburg, DE
Robert Carroll · Berkeley, US
Robert Fehler · Regensburg, DE

Key dates

Filing date	Nov 14, 2023
Grant date	Oct 29, 2024
Priority date	—
Expiry date	Nov 14, 2043

Classification

Technology area (CPC H)Electricity
CPC primaryH01L2924/19104
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

A method includes providing an interposer that includes an electrically insulating substrate, upper contact pads disposed on an upper surface, and lower contact pads disposed on a lower surface, providing a semiconductor package that includes a semiconductor die embedded within a package body and a plurality of package terminals exposed from the package body, providing a first passive electrical element that comprises first and second terminals, forming a first electrical connection between the first terminal of the first passive electrical element and a first one of the lower contact pads via the interposer, forming a second electrical connection between the second terminal of the first passive electrical element and a first one of the package terminals, and forming a third electrical connection between a second one of the package terminals and a second one of the lower contact pads via the interposer.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.