Low resistance and high reliability metallization module
US12148660B2 · kind B2 · utility
0Cited by
11References
10Claims
0Family size
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Key dates
| Filing date | Sep 28, 2021 |
| Grant date | Nov 19, 2024 |
| Priority date | — |
| Expiry date | Jan 2, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2221/1063
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Provided are methods of forming vias with decreased resistance by selectively depositing a barrier layer on an insulating layer and not on a metallic surface. Some embodiments of the disclosure utilize a planar hydrocarbon to form a blocking layer on metallic surfaces. Deposition is performed to selectively deposit on the unblocked insulating surfaces.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.