Processor-guided execution of offloaded instructions using fixed function operations
US12153926B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 21, 2023 |
| Grant date | Nov 26, 2024 |
| Priority date | — |
| Expiry date | Dec 21, 2043 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Processor-guided execution of offloaded instructions using fixed function operations is disclosed. Instructions designated for remote execution by a target device are received by a processor. Each instruction includes, as an operand, a target register in the target device. The target register may be an architected virtual register. For each of the plurality of instructions, the processor transmits an offload request in the order that the instructions are received. The offload request includes the instruction designated for remote execution. The target device may be, for example, a processing-in-memory device or an accelerator coupled to a memory.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.