Memory devices including oxide semiconductor
US12199183B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 25, 2022 |
| Grant date | Jan 14, 2025 |
| Priority date | — |
| Expiry date | Aug 25, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B61/22
Abstract
A method of forming a device comprises forming dielectric structures over other dielectric structures overlying conductive contact structures, the dielectric structures separated from one another by trenches and laterally extending orthogonal to the other dielectric structures and the conductive contact structures. Conductive gate structures are formed on exposed side surfaces of the dielectric structures within the trenches. Dielectric oxide structures are formed on exposed side surfaces of the conductive gate structures within the trenches. Exposed portions of the other dielectric structures are removed to form isolation structures. Semiconductive pillars are formed on exposed side surfaces of the dielectric oxide structures and the isolation structures within the trenches. The semiconductive pillars are in electrical contact with the conductive contact structures. Additional conductive contact structures are formed on upper surfaces of the semiconductive pillars. A device, a memory device, and an electronic system are also described.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.