ECC optimization
US12212337B2 · kind B2 · utility
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22Claims
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Key dates
| Filing date | Mar 30, 2023 |
| Grant date | Jan 28, 2025 |
| Priority date | — |
| Expiry date | Apr 21, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M13/616
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An integrated circuit (IC) device includes an error correction code (ECC) encoder circuitry configured to receive input data, determine min-terms in a Hamming matrix (H-Matrix) corresponding to the input data, and generate ECC data based on the min-terms and an output codeword based on the ECC data, and an error correction circuitry configured to generate a corrected output codeword based on the output codeword.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.