Semiconductor package having a thermally and electrically conductive spacer
US12224222B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 11, 2022 |
| Grant date | Feb 11, 2025 |
| Priority date | — |
| Expiry date | Jan 25, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2224/48177
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor package includes: a first substrate having a first metallized side; a semiconductor die attached to the first metallized side of the first substrate at a first side of the die, a second side of the die opposite the first side being covered by a passivation, the passivation having a first opening that exposes at least part of a first pad at the second side of the die; a thermally and electrically conductive spacer attached to the part of the first pad that is exposed by the first opening in the passivation, the spacer at least partly overhanging the passivation along at least one side face of the semiconductor die; a second substrate having a first metallized side attached to the spacer at an opposite side of the spacer as the semiconductor die; and an encapsulant encapsulating the semiconductor die and the spacer. Additional spacer embodiments are described.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.