Packaged electronic devices having dielectric substrates with thermally conductive adhesive layers
US12224233B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 27, 2021 |
| Grant date | Feb 11, 2025 |
| Priority date | — |
| Expiry date | Aug 10, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/19107
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A packaged electronic device comprises a power semiconductor die that comprises a first terminal and a second terminal, a lead frame comprising a lower side and an upper side that comprises a die pad region, a first lead and a second lead, wherein the first lead is integral with the lead frame and electrically connected to the first terminal of the power semiconductor die through the lead frame, a dielectric substrate, and a thermally conductive adhesion layer on an upper side of the dielectric substrate. The power semiconductor die is on the die pad region of the lead frame and the lead frame is on an upper side of the thermally conductive adhesion layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.