Chip with a silicon carbide substrate
US12327727B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 31, 2023 |
| Grant date | Jun 10, 2025 |
| Priority date | — |
| Expiry date | Aug 31, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/233
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A chip is provided. In an embodiment, the chip includes a silicon carbide substrate, a first sputtered metal layer on the silicon carbide substrate, and at least one second sputtered metal layer on the first sputtered metal layer. The first sputtered metal layer and the at least one second sputtered metal layer form an electrical contact. In another embodiment, the chip includes a silicon carbide substrate, a nickel-silicon layer on the silicon carbide substrate, and a layer sequence including a titanium layer, a nickel-containing layer, and a gold-tin or silver layer on the nickel-silicon layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.