Integrated circuit structures having metal gates with tapered plugs

US12364002B2 · kind B2 · utility

Assignee

• Intel Corporation · US

Inventors

• Mohammad HASAN · Beaverton, US
• Biswajeet Guha · Hillsboro, US
• Oleg Golonzka · Beaverton, US
• Leonard P. GULER · Hillsboro, US
• Leah Shoer · Beaverton, US
• Daniel G. Ouellette · Portland, US
• Pedro Franco Navarro · Portland, US
• Tahir Ghani · Portland, US

Key dates

• Filing date: Jun 25, 2021
• Grant date: Jul 15, 2025
• Expiry date: Oct 25, 2043

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D84/0135
• WIPO field: Micro-structural and nano-technology
• WIPO sector: Chemistry

Abstract

Integrated circuit structures having metal gates with tapered plugs, and methods of fabricating integrated circuit structures having metal gates with tapered plugs, are described. For example, includes a fin having a portion protruding above a shallow trench isolation (STI) structure. A gate dielectric material layer is over the protruding portion of the fin and over the STI structure. A conductive gate layer is over the gate dielectric material layer. A conductive gate fill material is over the conductive gate layer. A dielectric gate plug is laterally spaced apart from the fin. The dielectric gate plug is on the STI structure, and the dielectric gate plug has sides tapered outwardly from a top of the dielectric gate plug to a bottom of the dielectric gate plug.