Patent · US Active

Defect examination on a semiconductor specimen

US12400319B2 · kind B2 · utility

0Cited by
2References
18Claims
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Inventors

Key dates

Filing dateSep 6, 2022
Grant dateAug 26, 2025
Priority date
Expiry dateOct 28, 2043

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06T2207/30148
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

There is provided a system and method for defect examination on a semiconductor specimen. The method comprises obtaining a runtime image of the semiconductor specimen, generating a reference image based on the runtime image using a machine learning (ML) model, and performing defect examination on the runtime image using the generated reference image. The ML model is previously trained during setup using a training set comprising one or more pairs of training images, each pair including a defective image and a corresponding defect-free image. The training comprises, for each pair, processing the defective image by the ML model to obtain a predicted image, and optimizing the ML model to minimize a difference between the predicted image and the defect-free image.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.