Patent · US Active

Embedded package with shielding pad

US12431367B2 · kind B2 · utility

0Cited by

2References

20Claims

0Family size

Assignee

Infineon Technologies AG · DE

Inventors

Robert Fehler · Regensburg, DE
Angela Kessler · Regensburg, DE
Kushal Kshirsagar · Apponaug, US
Emanuele Bodano · Padova, IT
Martin Benisek · Regensburg, DE

Key dates

Filing date	Mar 17, 2023
Grant date	Sep 30, 2025
Priority date	—
Expiry date	Apr 17, 2044

Classification

Technology area (CPC H)Electricity
CPC primaryH01L2924/1815
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

A semiconductor package includes a laminate package substrate, first and second power transistor dies embedded within the laminate package substrate, a driver die embedded within the laminate package substrate, a plurality of I/O routings electrically connected with I/O terminals of the driver die, a switching signal pad electrically connected with a second load terminal of the first power transistor die and a first load terminal of the second power transistor die, and a shielding pad that is configured to electrically shield at least one of the I/O routings from the switching signal pad during operation of the first and second power transistor dies.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.