Multistep planarized chemical vapor deposition process with the use of low melting inorganic material for flowing while depositing
US4962063A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 10, 1989 |
| Grant date | Oct 9, 1990 |
| Priority date | — |
| Expiry date | Mar 10, 2009 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/908
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An improved planarization process is disclosed which comprises depositing over a patterned integrated circuit structure on a semiconductor wafer a conformal insulation layer by ECR plasma deposition of an insulation material. The ECR plasma deposition is carried out until the trenches or low regions between adjacent raised portions of the structure are completely filled with insulation material. A planarization layer of a low melting glass material, such as a boron oxide glass, is then flowed as it is deposited over the integrated circuit structure to a depth or thickness sufficient to cover the highest portions of the ECR plasma deposited insulation layer. This planarization layer is then anistropically etched back sufficiently to provide a planarized surface on the ECR plasma deposited insulation layer. A further layer of insulation material may then be conventionally CVD deposited over the planarized ECR plasma deposited insulation layer which acts to encapsulate any remaining portions of the planarizing layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.