Transistor with overlapping gate/drain and two-layered gate structures
US5053849A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Apr 25, 1990 |
| Grant date | Oct 1, 1991 |
| Priority date | — |
| Expiry date | Apr 25, 2010 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/662
Abstract
Herein disclosed is a semiconductor device of high density. The semiconductor device having a high density and a microstructure is required to have a high breakdown voltage and a high speed even with a low supply voltage. The semiconductor device comprises: a semiconductor body; a gate insulating film formed over the body; and a MOS transistor having a source/drain region formed in the body and a gate electrode film formed over the gate insulating film. The gate electrode film is composed of two or more films having different etching rates. The gate etching is stopped at the interface of the composite film to form an inverse-T gate electrode structure; and in that an electric conduction is observed between the component films. Thus, the overlap between the gate and the drain can be controlled.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.