Process for metallizing integrated circuits with electrolytically-deposited copper
US5151168A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Sep 24, 1990 |
| Grant date | Sep 29, 1992 |
| Priority date | — |
| Expiry date | Sep 24, 2010 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76879
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A masked, conformal electrodeposition process for copper metallization of integrated circuits. The process is considerably less complex than other metallization processes utilizing electrodeposition, and provides excellent step coverage for sub-micron contact openings. Full-step coverage has been obtained with the process for contact openings as small as 0.5 microns in diameter. The process begins with the blanket sputter or LPCVD deposition of a thin conductive barrier layer of a material such as titanium nitride, titanium-tungsten or nitrided titanium-tungsten. A photoresist reverse image of the maskwork that normally would be used to etch the metallization pattern on the circuitry is created on the wafer on top of the barrier layer. As an option, the reverse image of the desired metallization pattern may be created by etching a dielectric material layer such as silicon dioxide or silicon nitride, using a photoresist reverse image as a template. The wafer is then transferred to an electrolytic bath, preferably with a pH of 13.5, in which copper is complexed with EDTA molecules. Metallic copper is deposited on the barrier layer where it is not covered by photoresist. At current de…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.