Semiconductor processing method for forming substrate isolation trenches
US5229316A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Apr 16, 1992 |
| Grant date | Jul 20, 1993 |
| Priority date | — |
| Expiry date | Apr 16, 2012 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/959
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor processing method for forming a substrate isolation trench includes the following steps: a) providing a layer of selected material atop a substrate to a selected thickness; b) providing a sacrificial layer of a selected etch stop material to a selected thickness atop the layer of selected material; c) patterning and etching through the sacrificial layer and selected material layer, and into the substrate to define an isolation trench; d) depositing a trench filling material to a selected thickness atop the substrate and within and filling the isolation trench; e) planarize etching the trench filling material using the sacrificial layer as an effective etch stop for such planarize etching; f) etching the sacrificial layer from the substrate and thereby leaving a pillar of trench filling material projecting upwardly relative to an upper substrate surface; and g) selectively etching the projecting pillar relative to the upper substrate surface.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.