Method of forming a semiconductor structure having an air region

US5324683A · kind A · utility

Assignee

• Motorola, Inc. · US

Inventors

• Jon T. Fitch · Austin, US
• Papu D. Maniar · Austin, US
• Keith E. Witek · Austin, US
• Jerry Gelatos · Austin, US
• Reza Moazzami · Austin, US
• Sergio A. Ajuria · Austin, US

Key dates

• Filing date: Jun 2, 1993
• Grant date: Jun 28, 1994
• Expiry date: Jun 2, 2013

Classification

• Technology area (CPC Y): Emerging Cross-Sectional Technologies
• CPC primary: Y10S148/073
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

A method for forming an air region or an air bridge overlying a base layer (12). Air regions (20a, 20b, 28a, and 48) are formed overlying the base layer (12) to provide for improved dielectric isolation of adjacent conductive layers, provide air-isolated conductive interconnects, and/or form many other microstructures or microdevices. The air regions (20a, 20b, 28a, and 48) are formed by either selectively removing a sacrificial spacer (16a and 16b) or by selectively removing a sacrificial layer (28, 40). The air regions (20a, 20b, 28a, and 48) are sealed, enclosed, or isolated by either a selective growth process or by a non-conformal deposition technique. The air regions (20a, 20b, 28a, and 48) may be formed under any pressure, gas concentration, or processing condition (i.e. temperature, etc.). The air regions (20a, 20b, 28a, and 48) may be formed at any level within an integrated circuit.