Method for forming a BiCDMOS

US5374569A · kind A · utility

Assignee

• SILICONIX INCORPORATED · US

Inventors

• Hamza Yilmaz · Saratoga, US
• Richard K. Williams · Cupertino, US
• Michael E. Cornell · Campbell, US
• Jun-Wei Chen · Tianjin, CN

Key dates

• Filing date: Mar 5, 1993
• Grant date: Dec 20, 1994
• Expiry date: Mar 5, 2013

Classification

• Technology area (CPC Y): Emerging Cross-Sectional Technologies
• CPC primary: Y10S148/085

Abstract

A process is disclosed which simultaneously forms high quality complementary bipolar transistors, relatively high voltage CMOS transistors, relatively low voltage CMOS transistors, DMOS transistors, zener diodes and thin-film resistors, or any desired combination of these, all on the same integrated circuit chip. The process uses a small number of masking steps, forms high performance transistor structures, and results in a high yield of functioning die. Isolation structures, bipolar transistor structures, CMOS transistor structures, DMOS transistor structures, zener diode structures, and thin-film resistor structures are also disclosed.