Apparatus for testing, burn-in, and/or programming of integrated circuit chips, and for placing solder bumps thereon
US5374893A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Sep 27, 1993 |
| Grant date | Dec 20, 1994 |
| Priority date | — |
| Expiry date | Sep 27, 2013 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/49144
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
An integrated circuit chip having solder bumps thereon may be tested using a temporary substrate having substrate pads corresponding to locations of the input/output pads on the chip and having a sacrificial conductor layer on the temporary substrate pads. The solder bumps are placed adjacent the corresponding sacrificial metal layer and heated to form an electrical and mechanical connection between the chip and the temporary substrate. The chip is then tested and/or burned-in on the temporary substrate. After testing/burn-in, the sacrificial metal layer is dissolved into the solder bumps by heating. The integrated circuit chip, including a solder bump having the dissolved sacrificial metal layer therein, may be easily removed from the temporary substrate. Solder bumps may also be formed on the temporary substrate and transferred to unbumped chips. Solder bumps with different characteristics may be formed by varying the current-time product to each individual pad of the temporary substrate during a plating operation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.