Use of electrostatic forces to reduce particle contamination in semiconductor plasma processing chambers
US5410122A · kind A · utility
20Cited by
9References
13Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 15, 1993 |
| Grant date | Apr 25, 1995 |
| Priority date | — |
| Expiry date | Mar 15, 2013 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01J2237/022
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
Particles are repelled from the upper face of a wafer in a plasma chamber by inducing positive or negative charges on the substrate without generating a gas plasma above the substrate. The charges are induced in the substrate by bringing a conductive sheet carrying a DC voltage close to the underside of the substrate. The particle repelling effect may be enhanced by inducing alternating positive and negative charges in the substrate. This can be done by switching the polarity of the DC voltage applied to the conductive sheet, or alternatively by moving an actuator to repetitively ground and isolate the substrate from the chamber.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.