Method of manufacturing semiconductor metal wiring layer by reduction of metal oxide
US5424246A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jul 30, 1993 |
| Grant date | Jun 13, 1995 |
| Priority date | — |
| Expiry date | Jul 30, 2013 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/12044
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
According to this invention, there is provided a method of forming a groove wiring layer, including the steps of forming a metal oxide film, consisting of a metal oxide having a decrease in standard free energy smaller than a decrease in standard free energy of a hydrogen oxide or of a carbon oxide, on an insulating film formed on a semiconductor substrate, and reducing the metal oxide film to form an electrode-wiring layer consisting of a metal which is a main component constituting the metal oxide. In this manner, an electrode-wiring layer having high EM and SM resistances without causing an increase in electric resistivity caused by an impurity or the like can be obtained.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.