Recessed via apparatus for testing, burn-in, and/or programming of integrated circuit chips, and for placing solder bumps thereon
US5447264A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jul 1, 1994 |
| Grant date | Sep 5, 1995 |
| Priority date | — |
| Expiry date | Jul 1, 2014 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2203/0726
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A temporary substrate for solder bumps may be used to transfer solder bumps to a microelectronic device. The temporary substrate includes a solder nonwettable surface and a plurality of conductive vias therein. A solder bump is formed on each of the conductive vias and is electrically and mechanically connected thereto. The solder bump extends over the solder nonwettable surface to produce a solder bump cross-sectional area which is greater than the cross-sectional area of the conductive via. A microelectronic device is placed adjacent the temporary substrate with each input/output pad adjacent a respective solder bump. An electrical and mechanical connection is formed between the solder bump and the input/output pad, and the microelectronic device is separated from the temporary substrate with the solder bump remaining connected to the input/output pad. The temporary substrate can also be used for burn-in and testing of microelectronic devices and rework on multichip modules.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.