Semiconductor structure having an air region and method of forming the semiconductor structure
US5510645A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jan 17, 1995 |
| Grant date | Apr 23, 1996 |
| Priority date | — |
| Expiry date | Jan 17, 2015 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S148/073
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for forming an air region or an air bridge overlying a base layer (12). Air regions (20a, 20b, 28a, and 48) are formed overlying the base layer (12) to provide for improved dielectric isolation of adjacent conductive layers, provide air-isolated conductive interconnects, and/or form many other microstructures or microdevices. The air regions (20a, 20b, 28a, and 48) are formed by either selectively removing a sacrificial spacer (16a and 16b) or by selectively removing a sacrificial layer (28, 40). The air regions (20a, 20b, 28a, and 48) are sealed, enclosed, or isolated by either a selective growth process or by a non-conformal deposition technique. The air regions (20a, 20b, 28a, and 48) may be formed under any pressure, gas concentration, or processing condition (i.e. temperature, etc.). The air regions (20a, 20b, 28a, and 48) may be formed at any level within an integrated circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.