Wafer transport method
US5562800A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Sep 19, 1994 |
| Grant date | Oct 8, 1996 |
| Priority date | — |
| Expiry date | Sep 19, 2014 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/935
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A wafer transport method includes the steps of preparing a semiconductor process equipment having a transport chamber and a process chamber. An interface means connects the transport chamber to the process chamber. A transport means transports a semiconductor wafer from the transport chamber to the process chamber by way of the interface means. The transport means mounting a substrate is inserted into a communicating corridor including a supply means and an exhaust means. The substrate is transported while performing the supply and exhaust by sequentially controlling a supply shutoff means, an exhaust shutoff means, and a communicating shutoff means according to the position of a conductance part formed of a gap between the transport means and the communicating corridor. Thus, the substrate is transported at a high throughput without contamination of the substrate while keeping the different atmospheric conditions for the transport chamber and the process chamber, thereby manufacturing a semiconductor device with high performance capabilities.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.