Multi-step chemical vapor deposition method for thin film transistors
US5567476A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Apr 25, 1995 |
| Grant date | Oct 22, 1996 |
| Priority date | — |
| Expiry date | Apr 25, 2015 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/0321
- WIPO fieldSurface technology, coating
- WIPO sectorChemistry
Abstract
A multi-step CVD method for thin film transistor is disclosed. The method can be carried out by depositing a high quality g-SiN.sub.x at a low deposition rate on top of an average quality gate nitride deposited at a high deposition rate and then depositing an amorphous silicon layer. It also applies in a process where high quality amorphous silicon is first deposited at a low deposition rate on a gate nitride layer to form an interface, and then average quality amorphous silicon is deposited at a high deposition rate to complete the silicon layer. The unique process can be applied whenever an interface exists with an active semiconductor layer of amorphous silicon. The process is applicable to either the back channel etched TFT device or the etch stopped TFT device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.