Tunneling technology for reducing intra-conductive layer capacitance
US5670828A · kind A · utility
63Cited by
23References
21Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 21, 1995 |
| Grant date | Sep 23, 1997 |
| Priority date | — |
| Expiry date | Feb 21, 2015 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The control speed of semiconductor circuitry is increased by forming air tunnels in the interwiring spaces of a conductive pattern to reduce intra-conductive layer capacitance.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.