Planarized trench and field oxide isolation scheme
US5691232A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Nov 29, 1995 |
| Grant date | Nov 25, 1997 |
| Priority date | — |
| Expiry date | Nov 29, 2015 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/97
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An isolation method for separating active regions in a semiconductor substrate by combining field oxide formation with trench isolation is disclosed. Deep trenches are etched in a silicon substrate. An oxide layer is deposited over the entire substrate such that the oxide layer also fills the trenches that have been etched. Next, a layer of polysilicon is deposited over the wafer and etched back to form polysilicon spacers. These polysilicon spacers are used to align a photoresist mask that is used to etch the oxide overlying the active regions of the substrate, thereby resulting in fully planarized isolation regions with fully walled active regions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.