Trench isolation for active areas and first level conductors

US5734192A · kind A · utility

Assignee

• International Business Machines Corporation · US

Inventors

• Edward W. Sengle · South Burlington, US
• Mark D. Jaffe · Shelburne, US
• Daniel N. Maynard · Craftsbury Common, US
• Mark A. Lavin · Katonah, US
• Eric J. White · Vergennes, US
• John A. Bracchitta · South Burlington, US

Key dates

• Filing date: Dec 22, 1995
• Grant date: Mar 31, 1998
• Expiry date: Dec 22, 2015

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L2924/0002
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

A trench isolation structure for a semiconductor is provided including an isolation ring and an isolation path. The isolation ring surrounds active semiconductor areas and is bordered on the outside by inactive semiconductor area. The isolation path extends from the isolation ring through the inactive semiconductor area. A first level conductor on the isolation path electrically connects or capacitively couples a device in the active semiconductor area to a location on the substrate outside the isolation ring. The isolation path has a configuration derived from the layout of the conductor.