Method for forming trench isolation for semiconductor device
US5756389A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Apr 8, 1996 |
| Grant date | May 26, 1998 |
| Priority date | — |
| Expiry date | Apr 8, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/763
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device isolating method is disclosed which may include the steps of: forming a buffer layer and an insulating layer on a semiconductor substrate, and etching to remove partially the insulating layer so as to form an opening corresponding to the device isolating region; forming hemispherical polysilicon patterns on the whole surface of the substrate; removing the buffer layer exposed between the HSG-Si patterns on the bottom of the opening, and dry-etching the resultant exposed silicon regions to form a plurality of trenches and silicon poles with a certain depth and length; forming an oxide layer on the inside of the trench, and filling the interior of the trench with polysilicon; and oxidizing the polysilicon filled in the trench to form a device isolating region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.