Polishing pad used for polishing silicon wafers and polishing method using the same
US5827395A · kind A · utility
5Cited by
4References
8Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 31, 1995 |
| Grant date | Oct 27, 1998 |
| Priority date | — |
| Expiry date | May 31, 2015 |
Classification
- Technology area (CPC B)Performing Operations; Transporting
- CPC primaryB24B37/24
- WIPO fieldMachine tools
- WIPO sectorMechanical engineering
Abstract
A polishing pad composed of a rigid polyurethane added with CaCO.sub.3 particles is able to provide polished wafers having a surface roughness which is comparable to that attained by the conventional final polishing process. Even when polishing is achieved under a high load condition to improve the productivity, the polished wafers are free from deformation, such as concaving, and have an excellent flatness.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.